Redução do consumo de potência de circuitos integrados utilizando esquemas de codificação em conjunto com a ferramenta orion.

Abstract

The constant increase of integration density and performance of integrated circuits allow increasingly complex systems on a single chip, which therefore increases the power consumption, even using network on chip (NoC) in bus architectures. There are several ways to reduce the power consumption on the NoC`s. As an example, it is possible to reduce the number of switching routers for communication - the Operands Encode technique - during communications. This work aims to investigate techniques to reduce power consumption in the networks on chip. For this purpose, different techniques for encoding operands are compared.